# Multi-cellular Logic Circuits

## Abstract

I present a simple model of the underlying logic of multi-cellular organisms, and exploit the model to design multi-cellular logic circuits. In this model, an organism or circuit consists of a set of cells containing identical logic units. The logic units compute an output signal that is a fixed function of their input signals. Three kinds of signals are used: "factor" signals which target logic units in the same cell, "inter-cellular" signals which target logic units in neighboring cells, and "developmental" signals which either trigger developmental events like cell division, or are used to mark the results of developmental events. In the model, a logic circuit is always initialized as a single cell, and undergoes a developmental phase (to be simulated in software) until it reaches a fixed "adult" configuration, which can be implemented in hardware. The adult logic circuit consists of many identical cells, differing only in their history and neighbors, and should compute a desired input- output function. I give two examples of the overall design strategy by presenting a multi-cellular logic circuit for a random-access memory, and a multi-cellular logic circuit that smoothes an image by optimizing a weighted-least-squares function.