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EE26 Digital Logic Systems:
Homework
Spring Semester 2003
| Homework |
Problems |
Due Date |
Solutions |
| HW 1 |
HANDOUT |
1/21/03 |
HW#1 Solutions |
| HW 2 |
HANDOUT |
1/28/03 |
HW#2 Solutions |
| HW 3 |
Hazard Problem from HW#2 Chapter 2 Problems: 10,
11, 15, 16, 20, 21 Chapter 3 Problems: 2, 3, 5 |
2/6/03 |
HW#3 Solutions |
| HW 4 |
Chapter 3 Problems: 4, 10, 16 Implement a 4-bit adder
using full adders with a ripple carry implementation in Xilinx
and hand in both the schematic and the output waveforms for the simulation |
2/13/03 |
HW#4 Solutions |
| HW 5 |
Chapter 2 Problems: 22, 23 Modify the vending machine problem
given in class so that it resets after every package of gum is released. You
must show 1. Redrawn state diagram 2. Redo excitation tables and k-maps
3. Implement with D-flip flops using Xilinx schematic capture and exercise your
design by going through 3 different paths of the state diagram |
NOW DUE 2/25/03!! |
HW#5 Solutions |
| HW 6 |
HANDOUT |
2/27/03 |
HW#6 Solutions |
| HW 7 |
HANDOUT |
3/6/03 |
HW#7 Solutions |
| HW 8 |
HANDOUT IN EECS OFFICE - please pick up |
4/3/03 |
HW#8 Solutions |
| HW 9 |
HANDOUT (with all figures!) |
4/10/03 |
HW#9 Solutions |
| HW 10 |
HANDOUT (with missing figure on handout) VHDL ASSIGNMENT
Altera Tutorial VHDL TUTORIAL NOW HERE! |
4/24/03 |
HW#10 Solutions |
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