Visit the CADathlon 03 Web Pages
Visit the CADathlon 03 Web Pages
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HomeThe Winners!!The Results!!Great Pictures!!ProblemsPlatformParticipantsContest |
CADathlon 02 @ ICCAD ParticipantsTeam: No CommentTeam Member: Girish V. VaratkarAdvisor: Radu Marculescu University: Carnegie Mellon University Girish Varatkar is a graduate student in the ECE department at Carnegie Mellon, advised by Prof. Radu Marculescu. He received his B.Tech. in Electrical Engineering in May 2001 from the Indian Institute of Technology, Bombay. His research interests are in the system level design, particularly focusing on the communication traffic analysis for on-chip networks and energy-aware scheduling aspects of SOC design.Team Member: Tudor Dumitras Advisor: Radu Marculescu University: Carnegie Mellon University Tudor Dumitras is a graduate student in the ECE Department of the Carnegie Mellon University, working with Prof. Radu Marculescu. He obtained Bachelor's Degrees in Computer Scicence from the Ecole Polytechnique of Paris and the "Politehnica" University of Bucharest. His research interests include high-performance on-chip communication fabrics, formal methods and e-textiles.Official Team Number: 6 Team: WISC-CADTeam Member: Jeng-Liang TsaiAdvisor: Charile Chung-Ping Chen University: University of Wisconsin-Madison Clock delay and skew minimization techniques play important rols in timing convergence. However, optimal zero-skew wire-sizing has long been considered intractable due to its non-convex nature.Team Member: Clement Luk Advisor: Charile Chung-Ping Chen University: University of Wisconsin-Madison Simple RC extraction and simulation can no longer cope with the ever-increasing operating frequencies. However, the long-range inductance effect creates dense partial inductance matrices that prohibit full chip simulations.Official Team Number: 2 Team: TarkashTeam Member: Venkata Syam P RapakaAdvisor: Diana Marculescu University: Carnegie Mellon University Venkata is a second year graduate student in the ECE department at Carnegie Mellon University. He received his bachelors in Electrical Engineering in 2001 from the Indian Institute of Technology, Bombay. He has worked with Texas Instruments in developing a Hardware Emulation system for his final year undergrad thesis. He interned at Mentor Graphics during summer 2002, working on board level timing issues. His research interests include VLSI CAD, System Level Design and Computer Architecture.Team Member: Saurabh Kumar Tiwary Advisor: Rob A Rutenbar University: Carnegie Mellon University Saurabh is a second year graduate student in the ECE department at Carnegie Mellon University. He received his bachelors in Electrical Engineering in 2001 from the Indian Institute of Technology, Kanpur. During summer 2000, he interned at the EECS deptt. at University of Technology (RWTH), Aachen, Germany, working on input vector generation for power profiling of digital systems. His research interests include Analog IC design and VLSI CAD.Official Team Number: 12 Team: UIC CADLABTeam Member: Milos HrkicAdvisor: John Lillis University: University of Illinois at Chicago Milos Hrkic received the B.S. degree in computer science from the University of Illinois at Chicago. He is currently pursuing the Ph.D. degree in computer science at the University of Illinois at Chicago. His interests include Design Automation for VLSI, particulary physical design and timing optimization and combinatorial optimization. He has also interned at IBM Austin Research Laboratory in 2001 and 2002.Team Member: Devangkumar Jariwala Advisor: John Lillis University: University of Illinois at Chicago Devangkumar Jariwala received his B.E. degree in Electrical Engineering from Regional Engineering Surat, India. Currently, he is pursuing Ph.D. in Computer Science Department at University of Illinois at Chicago. His area of interest includes CAD for VLSI, particularly physical design and reconfigurable computing.Official Team Number: 4 Team: 16Team Member: S.C.HuangAdvisor: Shih-Chieh Chang University: National Tsing Hua University a boy who like play basketball and computer.Team Member: Kai-Chiang Wu Advisor: Shih-Chieh Chang University: National Tsing Hua University I like to make friend with people. and hope at this contest I will make more friends.Official Team Number: 16 Team: 10Team Member: Yin (Grace) NordinAdvisor: James Hoe University: Carnegie Mellon University Grace Nordin is a first year PhD student in the Electrical & Computer Engineering department at Carnegie Mellon University. Her research interests are hardware synthesis and high level modeling of hardware. She is currently working on synthesis of operation-centric hardware description with Dr. James Hoe.Team Member: Philip Chong Advisor: Robert Brayton University: UC Berkeley Philip Chong holds a BASc in computer engineering from the University of Waterloo and is currently a PhD candidate in EECS at the University of California at Berkeley. His current research is in the area of performance estimation and performance-driven floorplanning of globally asynchronous, latency-insensitive systems.Official Team Number: 10 Team: Monster CAD (Team #1)Team Member: Rupesh ShelarAdvisor: Sachin Sapatnekar University: Univeristy of Minnesota Rupesh S. Shelar obtained M. Tech. degree in Electrical Engineering from Indian Institute of Technology, Mumbai. Currently, he is a Ph. D. student at the department of ECE, Univeristy of Minnesota. He spent the summer of 2002 at Strategic CAD Labs., Intel. His research interests include logic synthesis and physical design.Team Member: Chirayu Amin Advisor: Yehea Ismail University: Northwestern University Chirayu Amin received his B.S. Computer Engineering degree with Summa Cum Laude from Northwestern University, Evanston, IL in June 2001. He also received the Best Senior in ECE departmental award and the International Engineering Consortium's William L. Everitt Award the same year. Chirayu joined the PhD program in ECE department at Northwestern University in VLSI CAD area in Fall 2001 and went on to intern at Intel Corporation’s Strategic CAD Labs during the summer of 2002. Currently, Chirayu is a second year graduate student. His research interests include circuit simulation, interconnect modeling and reduction, and timing analysis.Official Team Number: 1 Team: LonghornsTeam Member: Amit PrakashAdvisor: Adnan Aziz University: University of Texas at Austin Amit Prakash is a 4th yr. graduate student at the University of Texas at Austin. After earning his bachelor's degree in electrical engineering degree from the Indian Institute of Technology, Kanpur, he spent a year at Synopsys working in hardware-software co-verification. His research interests include architectures and algorithms for high speed networking. He has also worked on logic synthesis techniques for packet classification.Team Member: Kartik Mohanram Advisor: Nur Touba University: University of Texas at Austin Kartik Mohanram is a doctoral candidate in Computer Engineering at the University of Texas at Austin. He earned a Bachelor's degree in Electrical Engineering from the Indian Institute of Technology, Bombay in 1998. His research interests include VLSI testing and concurrent error detection.Official Team Number: 8 Team: CMU-CSSI Short TimersTeam Member: Matt MoeAdvisor: Herman Schmit University: Carnegie Mellon University Matt graduated with his B.S. and M.S. from Carnegie Mellon University in 1996 and 1998 respectively. He is currently researching methodologies for streamlining the design of Pipelined Arrays from specification to place and route. He has completed work on a new floorplanning methodology for Pipelined Arrays that uses Sequence Pairs. He is currently working on a specification methodology for Pipelined Arrays that easily creates wider flexibility of the design space beyond what is capable of being reached with one piece of HDL code. Matt is expected to graduate in May 2003.Team Member: Kumar N Dwarakanath Advisor: Shawn Blanton University: Carnegie Mellon University Kumar completed his BS from BITS Pilani, India and his MEng from Cornell University. He is currently finishing up his PhD thesis work on test analysis using Fault Tuples at Carnegie Mellon University. His research interests are in the areas of CAD and Test automation. He is a winner of a best paper and the best overall paper awards at SRC-Techon 2000. He is expected to graduate in January 2003.Official Team Number: 3 Team: VLSI AngelTeam Member: Yen-Te HoAdvisor: Ting-Ting Hwang University: National Tsing Hua University The man you are looking at comes from National Tsing Hua University, Taiwan. He is very genial and is interested in watching movies and shooping. The recently research area he looks into is about voltage scale for low power design. since he is just a new hand in this area, he hopes that he can obtain some good idea in this conference.Team Member: Chih-Chung Lin Advisor: Ting-Ting Hwang University: National Tsing Hua University This student's nickname is Duke. DUke comes from Taiwan and majors in Computer Science in National Tsing Hua University. The area where he researched is P&R in FPGA . He is a genial student and also a programming fan.Official Team Number: 11 Team: Black CADillacTeam Member: Aviral ShrivastavaAdvisor: Nikil Dutt University: University of California, Irvine He is a graduate student at UC Irvine, currently working on developing architectural features and compiler techniques for embedded systems. He has also worked in the standard cell library development.Team Member: Partha Biswas Advisor: Nikil Dutt University: University of California, Irvine He is a graduate student at UC Irvine, currently working on developing and tuning co-processor interfaces, and compilation for modern embedded systems. He has worked on development of CAD tools for layout and floorplanning.Official Team Number: 13 Team: 20Team Member: Bikram BaidyaAdvisor: Tamal Mukherjee University: Carnegie Mellon University Bikram Baidya received his B.Tech. degree in Electronics and Electrical Communication Engineering from Indian Institute of Technology, Kharagpur, India in 1997 followed by a M.S. degree in Electrical and Computer Engineering from Carnegie Mellon University, Pittsburgh, PA, in 1999. He is currently pursuing a Ph.D. degree in the MEMS laboratory at Carnegie Mellon University. His research interests include CAD for physical design automation, modeling of fluidic systems and extraction of integrated MEMS.Team Member: Debojyoti Dutta Advisor: Ashish Goel University: University of Southern California Debojyoti Dutta is a student in the PhD program at the University of Southern California. His research interests include algorithms for faster discrete event driven simulations, game theory and effiecient network design.Official Team Number: 20 Team: FooTeam Member: Matthew GuthausAdvisor: Richard Brown University: The University of Michigan Matthew R. Guthaus received his BSE in Computer Engineering and MSE in Electrical Engineering from The University of Michigan in 1998 and 2000, respectively. He is currently a Ph.D. Candidate in Electrical Engineering at The University of Michigan working for Prof. Richard Brown. During his Master's degree, he designed and tested a mixed-signal, 8-bit microcontroller for sensor and actuator applications. His research interests include low-power architecture for embedded systems, algorithm specific microprocessors, and computer-aided design of integrated circuits. His dissertation is on the optimization of standard cell libraries through placement, sizing, and technology mapping.Team Member: DoRon Motter Advisor: Igor Markov University: The University of Michigan DoRon Motter is a Ph.D pre-candidate at the University of Michigan. He received his M.S.E. in Computer Science and Engineering from the University of Michigan in May 2002. His graduate research has been focused on algorithms for satisfiability and applications, under Prof. Igor Markov. In addition he is a member of the quantum circuits group at the University of Michigan. DoRon received my B.S. in Computer Engineering from the University of Florida (with highest honors) in August 2000 along with minors in mathematics and physics.Official Team Number: 5 Team: Fibonacci HeapTeam Member: Donald ChaiAdvisor: Andreas Kuehlmann University: UC Berkeley Donald Chai received his BS in Electrical Engineering and Computer Science at Cornell University in 2001. His research involves new techniques for fundamental CAD algorithms and synthesis techniques for low power.Team Member: Frank E. Gennari Advisor: Andrew R. Neureuther University: UC Berkeley Frank E. Gennari received a B.S. degree in Electrical and Computer Engineering at Carnegie Mellon University in 2000 and an M.S. degree in Electrical Engineering and Computer Science at the University of California, Berkeley in 2002, where he is currently working on a Ph.D. His research involves CAD tools for advanced lithography and he enjoys designing CAD software and circuit simulators. His interests also include electronic circuit design, electronic repair, robotics, hiking, and designing 3DOfficial Team Number: 9 Team: 19Team Member: Daniel L. RosenbandAdvisor: Arvind University: MIT Daniel is a graduate student being supervised by Prof. Arvind in the Computation Structures Group in the Laboratory for Computer Science at MIT. His interests include supercomputing, computer architecture, and hardware design methodology. His current research focuses on high-level hardware synthesis algorithms. Previously, also in Prof. Arvind's group, Daniel worked on the hardware implementation of the StarT-Voyager multi-processor system. Daniel also spent two years in industry. As one of the founders of Sandburst Corp., he worked as hardware architect and development engineer on Sandburst's high-performance networking chips. He received his B.S. and M.Eng. in Electrical Engineering and Computer Science from MIT.Team Member: Jacob Schwartz Advisor: Arvind University: MIT Jacob is a doctoral student in the Computation Structures Group at MIT. His academic interests include functional programming languages and hardware design languages.Official Team Number: 19 |
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